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[SAR ADC] 논문 : Monotonic Capacitor Switching Procedure - 2. ADC Architecture
A 10-bit 50-MS/s SAR ADC With a Monotonic Capacitor Switching Procedure모노톤 커패시터 스위칭 절차를 적용한 10비트 50MS/s SAR ADC 이전 글 : https://brush-up.tistory.com/242 SECTION II.ADC Architecture 더보기To achieve 10-bit accuracy, a fully differential architecture suppresses the substrate and supply noise and has good common-mode noise rejection. SAR ADCs usually use a binary-weighted capacitor array rather than a..
시스템 반도체 설계/SAR ADC
2024. 12. 2. 00:46