목록시스템 반도체 설계 (31)
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[KICAD] kicad 사용법
1. kicad 설치 2. 프로젝트 만들기 새 프로젝트 만들기 sch 파일을 먼저 열어보자 3. 스케메틱 편집 그 후 원하는대로 회로도를 제작한다. 4. ERC 검사 후 오류 수정 문제가 있다면 아래처럼 화살표로 표시가 된다. 모든 오류 수정한후, 네트리스트 내보내기. 5. 네트리스트 내보내기 6. PCB 편집기로 전환 7. PCB에서 네트리스트 가져오기 자동으로 파일이 나오겠지만, 나오지 않는다면 오른쪽 상단의 파일을 선택하여 지정 그 후 네트리스트 로드 및 테스트 선택 하거나, PCB를 이미 제작중이었다면 PCB 업데이트 선택
[SAR ADC] 논문 : Monotonic Capacitor Switching Procedure - 4. Measurement Results, 5. Conclusion
A 10-bit 50-MS/s SAR ADC With a Monotonic Capacitor Switching Procedure모노톤 커패시터 스위칭 절차를 적용한 10비트 50MS/s SAR ADC 이전 글 : https://brush-up.tistory.com/244 SECTION IV.Measurement Results 더보기The prototype was fabricated using a one-poly–eight-metal (1P8M) 0.13-μm CMOS technology. The full micrograph and the zoomed-in view of the core are shown in Fig. 13. The total area of the chip is 0.93 mm × 1.03..
[SAR ADC] 논문 : Monotonic Capacitor Switching Procedure - 3. Implementation of Key Building Blocks
A 10-bit 50-MS/s SAR ADC With a Monotonic Capacitor Switching Procedure모노톤 커패시터 스위칭 절차를 적용한 10비트 50MS/s SAR ADC 이전 글 : https://brush-up.tistory.com/243 SECTION III.Implementation of Key Building Blocks더보기The fundamental building blocks of the proposed ADC are a S/H circuit, a dynamic comparator, SAR control logic, and a capacitor network. The design considerations of the building blocks are des..
[SAR ADC] 논문 : Monotonic Capacitor Switching Procedure - 2. ADC Architecture
A 10-bit 50-MS/s SAR ADC With a Monotonic Capacitor Switching Procedure모노톤 커패시터 스위칭 절차를 적용한 10비트 50MS/s SAR ADC 이전 글 : https://brush-up.tistory.com/242 SECTION II.ADC Architecture 더보기To achieve 10-bit accuracy, a fully differential architecture suppresses the substrate and supply noise and has good common-mode noise rejection. SAR ADCs usually use a binary-weighted capacitor array rather than a..
A 10-bit 50-MS/s SAR ADC With a Monotonic Capacitor Switching Procedure모노톤 커패시터 스위칭 절차를 적용한 10비트 50MS/s SAR ADC 0. 초록(Abstract)더보기Abstract:This paper presents a low-power 10-bit 50-MS/s successive approximation register (SAR) analog-to-digital converter (ADC) that uses a monotonic capacitor switching procedure. Compared to converters that use the conventional procedure, the average switching ene..
Sigma-Delta Modulators: Tutorial Overview, Design Guide, and State-of-the-Art Survey 이전 글 : https://brush-up.tistory.com/307 더보기 더보기 더보기 더보기 더보기 더보기 더보기 더보기 더보기 더보기 더보기 더보기 https://ieeexplore.ieee.org/document/5672380 $\Sigma\Delta$ modulators, their operating principles an" data-og-host="ieeexplore.ieee.org" data-og-source-url="https://ieeexplore.ieee.org/document/567..
Sigma-Delta Modulators: Tutorial Overview, Design Guide, and State-of-the-Art Survey 이전 글 : https://brush-up.tistory.com/306 SECTION IV.Nonideal Performance and Systematic Design더보기In previous sections, ΣΔMs have been considered ideal systems except for their inherent quantization error. In practice, such an ideal performance is degraded as a consequence of the circuit error mechanisms.14 Ther..
[DSM] 논문 : Sigma-Delta Modulators (3) Taxonomy of ΣΔ Modulators
Sigma-Delta Modulators: Tutorial Overview, Design Guide, and State-of-the-Art Survey (3) Taxonomy of ΣΔ Modulators 이전 글 : https://brush-up.tistory.com/305 SECTION III.Taxonomy of ΣΔ ModulatorsΣΔ 변조기의 분류더보기A large number of ΣΔM architectures have been reported in the open literature that implement some (or all) the following, nonexclusive, strategies to improve DR [6], [7]:IncreasingL. Accordin..